1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device to form a gate electrode composed of p-type doped polysilicon.
2. Description of the Related Art
Semiconductor devices such as semiconductor memories include a great number of MOS transistors, and operation characteristics thereof significantly depend upon the characteristics of the MOS transistors.
Generally, threshold voltage differences occur between NMOS transistors and PMOS transistors, in which channels are formed on surfaces of semiconductor substrates in CMOS transistors. Such voltage differences induce a variety of limiting factors associated with designing or manufacturing semiconductor devices. As such, n-type dopants are applied to polysilicon of NMOS gate electrodes and p-type dopants are applied to polysilicon of PMOS gate electrodes (also referred to as “dual gate structures”).
In the dual gate of the CMOS transistor, since polysilicon layers for respective gate electrodes of the PMOS and NMOS are simultaneously vapor-deposited and patterned, undoped polysilicon is first vapor-deposited, then P, as the n-type dopant, is ion-implanted into the gate region of the NMOS, and B, as the p-type dopant, is ion-implanted into the gate region of the PMOS.
After heat treatment to activate dopants in the polysilicon layers, the doped polysilicon is etched, via an etching process, to form NMOS gate electrodes and PMOS gate electrodes.
Conventionally, 49BF2 has been used as the B dopant of the PMOS gate electrode of the CMOS transistor. When 49BF2 is used as the B dopant, the ion-implantation dose of F ions is twice that of the dose of B ions. This is advantageous in terms of inhibition of B ion diffusion by F ions, but 19F amplifies Transient Enhanced Diffusion (TED) of 11B which in turn leads to a threshold voltage shift (Vt shift) due to penetration of 11B. In addition, 49BF2 also suffers from increased thickness of an effective gate insulating layer due to the effects of 19F, thereby resulting in reduced drive current.
As such, in an attempt to solve these problems, a method of implantation 11B ions as the B dopant of the PMOS gate electrodes has been applied. However, due to the low implantation energy of 11B upon implantation, this method suffers from deterioration of mass productivity upon manufacturing semiconductor devices.